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XCVU125-1FLVB1760I 750 I/O Xilinx FPGA Chip

    Buy cheap XCVU125-1FLVB1760I 750 I/O Xilinx FPGA Chip from wholesalers
     
    Buy cheap XCVU125-1FLVB1760I 750 I/O Xilinx FPGA Chip from wholesalers
    • Buy cheap XCVU125-1FLVB1760I 750 I/O Xilinx FPGA Chip from wholesalers

    XCVU125-1FLVB1760I 750 I/O Xilinx FPGA Chip

    Ask Lasest Price
    Brand Name : Xilinx Inc.
    Model Number : XCVU125-1FLVB1760I
    Certification : Lead free / RoHS Compliant
    Price : USD 20000~26000 pcs
    Payment Terms : T/T, Western Union, Paypal, Trade Assurance, Credit Card
    Supply Ability : 65 pcs
    Delivery Time : 3-5 Day
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    XCVU125-1FLVB1760I 750 I/O Xilinx FPGA Chip

    XCVU125-1FLVB1760I Xilinx FPGA Chip FBGA-1760 Virtex UltraScale


    Product AttributeAttribute Value
    Xilinx
    FPGA - Field Programmable Gate Array
    Virtex UltraScale
    1566600
    750 I/O
    0.85 V
    - 40 C
    + 100 C
    SMD/SMT
    FBGA-1760
    Data Rate:30.5 Gb/s
    Series:XCVU125
    Brand:Xilinx
    Distributed RAM:9.7 Mbit
    Embedded Block RAM - EBR:88.6 Mbit
    Moisture Sensitive:Yes
    Product Type:FPGA - Field Programmable Gate Array
    Factory Pack Quantity:1
    Subcategory:Programmable Logic ICs
    Tradename:Virtex UltraScale

    Summary

    Virtex® UltraScale FPGAs: High-capacity, high-performance FPGAs enabled using both monolithic and next-generation SSI
    technology. Virtex UltraScale devices achieve the highest system capacity, bandwidth, and performance to address key market and
    application requirements through integration of various system-level functions.
    Virtex UltraScale+ HBM devices incorporate 4GB or 8GB HBM stacks adjacent to the FPGA die. Using
    stacked silicon interconnect technology, the FPGA communicates to the HBM stacks through memory
    controllers that connect to dedicated low-inductance interconnect in the silicon interposer. Each Virtex
    UltraScale+ HBM FPGA contains one or two HBM stacks, resulting in up to 16GB of HBM per FPGA.
    The FPGA has 32 HBM AXI interfaces used to communicate with the HBM. Through a built-in switch
    mechanism, any of the 32 HBM AXI interfaces can access any memory address on either one or both of the
    HBM stacks due to the flexible addressing feature. This flexible connection between the FPGA and the
    HBM stacks results in easy floorplanning and timing closure. The memory controllers perform read and
    write reordering to improve bus efficiency. Data integrity is ensured through error checking and correction
    (ECC) circuitry.

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